ABE-IPSABE HOLDINGABE BOOKS
English Polski
Dostęp on-line

Książki

0.00 PLN
Schowek (0) 
Schowek jest pusty
Digital Design, Global Edition

Digital Design, Global Edition

Autorzy
Wydawnictwo Pearson Education Limited
Data wydania 01/01/1900
Liczba stron 720
Forma publikacji książka w miękkiej oprawie
Poziom zaawansowania Dla profesjonalistów, specjalistów i badaczy naukowych
Język angielski
ISBN 9781292231167
Kategorie Projektowanie
512.40 PLN (z VAT)
$115.26 / €109.86 / £95.37 /
Produkt na zamówienie
Dostawa 3-4 tygodnie
Ilość
Do schowka

Opis książki

 

For introductory courses on digital design in an Electrical Engineering, Computer Engineering, or Computer Science department.

 

A clear and accessible approach to the basic tools, concepts, and applications of digital design

A modern update to a classic, authoritative text, Digital Design, 6th Edition teaches the fundamental concepts of digital design in a clear, accessible manner. The text presents the basic tools for the design of digital circuits and provides procedures suitable for a variety of digital applications. Like the previous editions, this edition of Digital Design supports a multimodal approach to learning, with a focus on digital design, regardless of language. Recognizing that three public-domain languages—Verilog, VHDL, and SystemVerilog—all play a role in design flows for today’s digital devices, the 6th Edition offers parallel tracks of presentation of multiple languages, but allows concentration on a single, chosen language.

Digital Design, Global Edition

Spis treści

Preface  

1  Digital Systems and Binary Numbers  

1.1   Digital Systems 

1.2   Binary Numbers 

1.3   Number-Base Conversions

1.4   Octal and Hexadecimal Numbers

1.5   Complements of Numbers

1.6   Signed Binary Numbers

1.7   Binary Codes

1.8   Binary Storage and Registers    

1.9   Binary Logic

 

2  Boolean Algebra and Logic Gates   

2.1   Introduction

2.2   Basic Definitions

2.3   Axiomatic Definition of Boolean Algebra

2.4   Basic Theorems and Properties of Boolean Algebra

2.5   Boolean Functions

2.6   Canonical and Standard Forms

2.7   Other Logic Operations

2.8   Digital Logic Gates

2.9   Integrated Circuits 

 

3  Gate-Level Minimization   

3.1   Introduction

3.2   The Map Method

3.3   Four-Variable K-Map

3.4   Product-of-Sums Simplification

3.5   Don’t-Care Conditions

3.6   NAND and NOR Implementation

3.7   Other Two-Level Implementations

3.8   Exclusive-OR Function

3.9   Hardware Description Languages (HDLs)

 

4  Combinational Logic   

4.1   Introduction

4.2   Combinational Circuits

4.3   Analysis of Combinational Circuits

4.4   Design Procedure

4.5   Binary Adder—Subtractor

4.6   Decimal Adder

4.7   Binary Multiplier

4.8   Magnitude Comparator

4.9   Decoders

4.10   Encoders

4.11   Multiplexers

4.12   HDL Models of Combinational Circuits   

  

5  Synchronous Sequential Logic   

5.1   Introduction

5.2   Sequential Circuits

5.3   Storage Elements: Latches

5.4   Storage Elements: Flip-Flops

5.5   Analysis of Clocked Sequential Circuits

5.6   Synthesizable HDL Models of Sequential Circuits

5.7   State Reduction and Assignment

5.8   Design Procedure

 

6  Registers and Counters   

6.1   Registers

6.2   Shift Registers

6.3   Ripple Counters

6.4   Synchronous Counters

6.5   Other Counters

6.6   HDL Models of Registers and Counters 

 

7  Memory and Programmable Logic   

7.1   Introduction

7.2   Random-Access Memory

7.3   Memory Decoding

7.4   Error Detection and Correction

7.5   Read-Only Memory

7.6   Programmable Logic Array

7.7   Programmable Array Logic

7.8   Sequential Programmable Devices

 

8   Design at the Register Transfer Level   

8.1   Introduction

8.2   Register Transfer Level (RTL) Notation

8.3   RTL descriptions VERILOG (Edge- and Level-Sensitive Behaviors)

8.4   Algorithmic State Machines (ASMs)

8.5   Design Example (ASMD Chart)

8.6   HDL Description of Design Example

8.7   Sequential Binary Multiplier

8.8   Control Logic

8.9   HDL Description of Binary Multiplier

8.10   Design with Multiplexers

8.11   Race-Free Design (Software Race Conditions)

8.12   Latch-Free Design (Why Waste Silicon?)

8.13   System Verilog–An Introduction

 

9   Laboratory Experiments with Standard ICs and FPGAs   

9.1   Introduction t

Polecamy również książki

Strony www Białystok Warszawa
801 777 223